[Remote] Digital Design Engineer – RTL/ASIC (AI Accelerators)

Note: The job is a remote job and is open to candidates in USA. Mentium Technologies Inc. is seeking an experienced ASIC RTL Design Engineer to design, implement and test complex digital RTL components for their digital AI accelerator. The role involves collaborating with various teams to deliver high-quality designs that meet performance, power, and area goals.

Responsibilities

• Manage and develop RTL components for complex systems and AI accelerators
• Define detailed micro-architectures based on high-level product specifications and requirements
• Write clean, efficient, synthesizable and reusable Verilog/SystemVerilog code with a focus on meeting frequency, power, and area targets
• Help with Integrating complex IPs (e.g., PCIe) into SoCs and perform relevant front-end integration activities (lint, CDC checks, synthesis, ECO)
• Work with verification teams to develop meaningful SystemVerilog assertions, constraints, checkers, and test benches
• Debug RTL code using modern simulation tools and waveform viewers, ensuring coverage closure and functional correctness
• Collaborate on timing closure with physical design teams, optimizing for performance, power, and area
• Coordinate with system architects to align design specifications and functional requirements
• Collaborate with physical design teams on synthesis, static timing, DFT, and ECO processes
• Perform power, performance, and area (PPA) trade-offs and drive architectural decisions to meet aggressive project goals

Skills

• Master's or PhD's in Electrical Engineering, Computer Engineering, or related field
• 5+ years of RTL design experience with 2+ years of experience in the industry
• Strong background in digital design principles, finite state machines (FSMs), and clock domain crossing (CDC)
• Proficiency in SystemVerilog
• Experience with front-end EDA tools (e.g., Synopsys, Cadence) including simulators, linters, and CDC checkers
• Knowledge of synthesis, static timing analysis, DFT, and ECO flows
• Skilled in scripting (Perl, Python) for automation and productivity enhancements
• Proven ability to troubleshoot and optimize designs using simulation tools and waveform viewers
• Basic knowledge of memory compilers, deep learning algorithms and neural networks
• Prior RTL design experience with microprocessors, SoCs, memory structures and managements, and/or interconnect IP
• Knowledge of SoC bus interconnect protocols (AXI4, AXI streaming, AHB)
• Experience with compute subsystem memory micro-architecture
• Validated knowledge of SystemVerilog assertions and verification IP
• Experience with PCIe interface integration and simulation
• Experience with designing of systems to accelerate deep neural networks

Benefits

• Competitive compensation packages
• Opportunity to work on diverse, cutting-edge AI projects across a range of industries.
• 401(k)
• Flexible PTO
• Full PPO medical, dental, and vision insurance coverage

Company Overview

We are developing the next paradigm in AI computation, to help our most important muscle, the brain, to go further and open new unthinkable landscapes, new opportunities and new jobs. It was founded in 2017, and is headquartered in Santa Barbara, California, USA, with a workforce of 2-10 employees. Its website is https://mentium.tech.

Company H1B Sponsorship

Mentium Technologies Inc. has a track record of offering H1B sponsorships, with 1 in 2026, 2 in 2023. Please note that this does not guarantee sponsorship for this specific role.